VSync 924 Dokumentacja Strona 71

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Matrox Solios eA/XA acquisition section 71
The following image is the acquisition section of Matrox Solios eA/XA.
On a separate bracket.
16
16
16
16
Acquisition section of Matrox Solios eA/XA
Video
to
PCI-X
Bridge
Input
Selector
low
pass
filter
DC
restoration
10-bit
A/D
LUTs
PSG
10 16
UART
RS-232
transceivers
Independent
acquisition path
Attenuator,
offset,
and
gain
Clock (LVDS/TTL)
Hsync/Csync
(LVDS/TTL)
✕✕
Vsync (LVDS/TTL)
Trigger (TTL)
Exposure (TTL)
Rx
Tx
VID_IN
B
A
Independent
acquisition
path 3
Independent
acquisition
path 2
Independent
acquisition
path 1
DVI
connectors
(0 and 1)
LVDS/TTL
drivers and
receivers
Opto-
couplers
Aux In
Aux In
Aux Out
DBHD-44
and
DB-9
connectors
*
8
8
✝✝
4
✝✝✝
Only acquisition path 0 is available on Matrox Solios eA/XA Single.
Only two auxiliary outputs are used on Matrox Solios eA/XA Single.
Four auxiliary outputs are used on Matrox Solios eA/XA Dual.
Only one opto-coupled auxiliary input is available on Matrox Solios eA/XA Single.
Two opto-coupled auxiliary inputs are available on Matrox Solios eA/XA Dual.
Independent
acquisition
path 0
✕✕
✝✝
✝✝✝
*
Only acquistion paths 0 and 1 are available on Matrox Solios eA/XA Dual.
The board can accept an HSYNC or CSYNC input signal, but it can only output an HSYNC signal.
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